Programmable ICs are user configurable ICs capable of implementing digital logic operations. There are several types of programmable ICs, including Complex Programmable Logic Devices (CPLDs) and Field Programmable Gate Arrays (FPGAs). CPLDs include function blocks based on programmable logic array (PLA) architecture and programmable interconnect lines to route and transmit signals between the function blocks. FPGAs include configurable logic blocks (CLBs), input output blocks (IOBs), and programmable interconnect lines that route and transmit signals between the CLBs, between the CLBs and IOBs, and between the IOBs. Each CLB includes look-up tables and other configurable circuitry that are programmable to implement logic functions. The function blocks of CPLDs, CLBs of FPGAs, and interconnect lines are configured by data stored in a configuration memory of the respective devices.
Electronic devices implemented using a programmable IC often include a non-volatile memory that is used to store a configuration bitstream for configuration of the programmable IC when powered on. Traditionally, the entire bitstream for complete configuration of programmable IC is stored in the non-volatile memory during manufacture of the device. Manufactures may produce a number of different boards, which differ in functionality and potentially in layout, but use the same programmable IC to implement different functionality. A different configuration bitstream is likely required for each FPGA-board produced. Using the traditional approach, bitstreams for each of the different configurations must be managed and kept current with the latest design version at the production site. Loading different bitstreams at the production site requires management and reconfiguration of production equipment that may increase production time and expense.
Additionally, updates in the field may not be easily performed. Typical updates, such as firmware updates, reprogram a non-volatile memory containing a configuration bitstream. To configure the programmable IC with the new bitstream, the programmable IC must be power cycled. However, power cycling may require communication interfaces of the programmable IC to be reset as well. For many communication protocols that are not hot swappable, such as PCIe, the external device linked to the programmable IC via the communication channel must be power cycled as well, which may or may not be possible.
One or more embodiments may address one or more of the above issues.